Design, Characterization And Compact Modeling Of Novel Silicon Controlled Rectifier (scr)-based Devices For Electrostatic Discha

Electrostatic Discharge (ESD), an event of a sudden transfer of electrons between two bodies at different potentials, happens commonly throughout nature. When such even occurs on integrated circuits (ICs), ICs will be damaged and failures result. As the evolution of semiconductor technologies, increasing usage of automated equipments and the emerging of more and more complex circuit applications, ICs are more sensitive to ESD strikes. Main ESD events occurring in semiconductor industry have been standardized as human body model (HBM), machine model (MM), charged device model (CDM) and international electrotechnical commission model (IEC) for control, monitor and test. In additional to the environmental control of ESD events during manufacturing, shipping and assembly, incorporating on-chip ESD protection circuits inside ICs is another effective solution to reduce the ESD-induced damage. This dissertation presents design, characterization, integration and compact modeling of novel silicon controlled rectifier (SCR)-based devices for on-chip ESD protection. The SCR-based device with a snapback characteristic has long been used to form a VSS-based protection scheme for on-chip ESD protection over a broad rang of technologies because of its low on-resistance, high failure current and the best area efficiency. The ESD design window of the snapback device is defined by the maximum power supply voltage as the low edge and the minimum internal circuitry breakdown voltage as the high edge. The downscaling of semiconductor technology keeps on squeezing the design window of on-chip ESD protection. For the submicron process and below, the turn-on voltage and sustain voltage of ESD protection cell should be lower than 10 V and higher than 5 V, respectively, to avoid core circuit damages and latch-up issue. This presents a big challenge to device/circuit engineers. Meanwhile, the high voltage technologies push the design window to another tough range whose sustain voltage, 45 V for instance, is hard for most snapback ESD devices to reach. Based on the in-depth elaborating on the principle of SCR-based devices, this dissertation first presents a novel unassisted, low trigger- and high holding-voltage SCR (uSCR) which can fit into the aforesaid ESD design window without involving any extra assistant circuitry to realize an area-efficient on-chip ESD protection for low voltage applications. The on-chip integration case is studied to verify the protection effectiveness of the design. Subsequently, this dissertation illustrate the development of a new high holding current SCR (HHC-SCR) device for high voltage ESD protection with increasing the sustain current, not the sustain voltage, of the SCR device to the latchup-immune level to avoid sacrificing the ESD protection robustness of the device. The ESD protection cells have been designed either by using technology computer aided design (TCAD) tools or through trial-and-error iterations, which is cost- or time-consuming or both. Also, the interaction of ESD protection cells and core circuits need to be identified and minimized at pre-silicon stage. It is highly desired to design and evaluate the ESD protection cell using simulation program with integrated circuit emphasis (SPICE)-like circuit simulation by employing compact models in circuit simulators. And the compact model also need to predict the response of ESD protection cells to very fast transient ESD events such as CDM event since it is a major ESD failure mode. The compact model for SCR-based device is not widely available. This dissertation develops a macromodeling approach to build a comprehensive SCR compact model for CDM ESD simulation of complete I/O circuit. This modeling approach offers simplicity, wide availability and compatibility with most commercial simulators by taking advantage of using the advanced BJT model, Vertical Bipolar Inter-Company (VBIC) model. SPICE Gummel-Poon (SGP) model has served the ICs industry well for over 20 years while it is not sufficiently accurate when using SGP model to build a compact model for ESD protection SCR. This dissertation seeks to compare the difference of SCR compact model built by using VBIC and conventional SGP in order to point out the important features of VBIC model for building an accurate and easy-CAD implement SCR model and explain why from device physics and model theory perspectives

Transport and Fate of MethyI Iodide and Its Pest Control in Soils

For fumigants, information on transport and fate, as well as pest control, is needed to develop management practices with the fewest human and environmental health risks while offering sufficient pest control efficacy. For this purpose, a 2-D soil chamber (60 cm wide, 60 cm long, and 6 cm thick) with a surface-mounted flux chamber was designed to determine volatilization, spatial and temporal distribution of soil gas-phase concentration, degradation and organism survivability after methyl iodide (MeI) fumigation. Three types of pests (barnyardgrass seed [Echinochloa crus-galli], citrus nematode [Tylenchulus semipenetrans], and fungi [Fusarium oxysporum]) were used to give a broad spectrum of pest control information. After MeI fumigation at a rate of 56.43 kg ha-1 for 24 hr, about 25.8 % of MeI was emitted into air, 6.8 % remained in the soil, and 43.6% degraded in the soil (based on the residual iodide concentration). The uncertainty in the measured MeI degradation using iodide concentration was thought to contribute to the unrecovered MeI (about 23%). Based on the spatial and temporal distribution of soil gas-phase concentration, the concentration-time index (CT) and its distribution was quantified. The citrus nematodes were effectively eliminated even at low CT values (< 30 µg hr ml-1) but all Fusarium oxysporum survived at the applied rate. The response of barnyardgrass seeds spatially varied with the concentration-time index (CT) values in the 2-D soil chamber. To fully control barnyardgrass seeds, CT of greater than 300 µg hr ml-1 was required. Using this experimental approach, different fumigant emission reduction strategies can be tested and mathematical models can be verified to determine which strategies produce least emission to atmosphere while maintaining sufficient pest control efficacy

Identification of candidate genes and clarification of the maintenance of the green pericarp of weedy rice grains

The weedy rice (Oryza sativa f. spontanea) pericarp has diverse colors (e.g., purple, red, light-red, and white). However, research on pericarp colors has focused on red and purple, but not green. Unlike many other common weedy rice resources, LM8 has a green pericarp at maturity. In this study, the coloration of the LM8 pericarp was evaluated at the cellular and genetic levels. First, an examination of their ultrastructure indicated that LM8 chloroplasts were normal regarding plastid development and they contained many plastoglobules from the early immature stage to maturity. Analyses of transcriptome profiles and differentially expressed genes revealed that most chlorophyll (Chl) degradation-related genes in LM8 were expressed at lower levels than Chl a/b cycle-related genes in mature pericarps, suggesting that the green LM8 pericarp was associated with inhibited Chl degradation in intact chloroplasts. Second, the F2 generation derived from a cross between LM8 (green pericarp) and SLG (white pericarp) had a pericarp color segregation ratio of 9:3:4 (green:brown:white). The bulked segregant analysis of the F2 populations resulted in the identification of 12 known genes in the chromosome 3 and 4 hotspot regions as candidate genes related to Chl metabolism in the rice pericarp. The RNA-seq and sqRT-PCR assays indicated that the expression of the Chl a/b cycle-related structural gene DVR (encoding divinyl reductase) was sharply up-regulated. Moreover, genes encoding magnesium-chelatase subunit D and the light-harvesting Chl a/b-binding protein were transcriptionally active in the fully ripened dry pericarp. Regarding the ethylene signal transduction pathway, the CTR (encoding an ethylene-responsive protein kinase) and ERF (encoding an ethylene-responsive factor) genes expression profiles were determined. The findings of this study highlight the regulatory roles of Chl biosynthesis- and degradation-related genes influencing Chl accumulation during the maturation of the LM8 pericarp

An Unassisted, Low Trigger-, And High Holding-Voltage Scr (Uscr) For On-Chip Esd-Protection Applications

A new silicon-controlled rectifier (SCR) is proposed and realized in a 0.35-μm/3.3-V fully salicided BiCMOS process for electrostatic-discharge (ESD) applications. Without using an external trigger circuitry, the unassisted SCR has a trigger voltage as low as 7 V to effectively protect deep-submicrometer MOS circuits, a holding voltage higher than the supply voltage to minimize transient influence and avoid latch-up issue, and a second snapback current density exceeding 60 mA/μm to provide robust ESD-protection solutions. © 2007 IEEE

An Improved Compact Model Of Silicon-Controlled Rectifier (Scr) For Electrostatic Discharge (Esd) Applications

This paper describes the development of a SPICE equivalent-circuit model of the silicon-controlled rectifier (SCR) for electrostatic discharge (ESD) protection applications. The framework developed includes the equivalent circuit, models for the various components imbedded in the SCR, and model parameters\u27 extraction. The new model is implemented into the industry standard Cadence SPICE and is verified against transmission line pulsing measured data. © 2008 IEEE

A Novel And Robust Un-Assisted, Low-Trigger And High-Holding Voltage Scr (Uscr) For Area-Efficient On-Chip Esd Protection

A novel and robust un-assisted low-trigger and high-holding voltage silicon controlled rectifier (uSCR) is proposed and realized in a 0.35-μm fully-salicided BiCMOS process. Without using any external trigger circuitry, the uSCR has a trigger voltage as low as 7 V to effectively protect deep submicron MOS circuits and a holding voltage higher than the supply voltage to minimize transient influence and avoid latch-up issue. Moreover, the electrostatic discharge (ESD) protection robustness of the uSCR in both positive and negative operations exceeds 60 mA/μm, which enables ESD protection levels of 8 kV human body model (HBM) and 2 kV charged device model (CDM) for a low voltage ICs, while each uSCR cell only consumes an area of about 2400μm2. © 2007 IEEE

An Improved Bidirectional Scr Structure For Low-Triggering Esd Protection Applications

An improved dual-polarity silicon-controlled rectifier (SCR) device has been proposed and realized in a 0.6- μ bipolar complementary metal-oxide-semiconductor process. The device can be used to protect electrostatic discharge (ESD) in both the positive and negative directions on pins with a voltage range that goes below ground. Comparing with the conventional bidirectional SCR structures, the new device is more suitable for low-voltage integrated circuit ESD protection applications because it possesses a smaller trigger voltage, a smaller leakage current, and a larger holding voltage. © 2008 IEEE